IRF640 Transistor MOSFET in Pakistan

IRF640 Transistor MOSFET in Pakistan

FEATURES SYMBOL QUICK REFERENCE DATA
• ’Trench’ technology
• Low on-state resistance VDSS = 200 V
• Fast switching
• Low thermal resistance ID = 16 A
RDS(ON) ≤ 180 mΩ
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor using Trench technology, intended for use in off-line
switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits
and general purpose switching applications.
The IRF640 is supplied in the SOT78 (TO220AB) conventional leaded package.
The IRF640S is supplied in the SOT404 (D2
PAK) surface mounting package.
PINNING SOT78 (TO220AB) SOT404 (D2
PAK)
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
EAS Non-repetitive avalanche Unclamped inductive load, IAS = 6.2 A; – 580 mJ
energy tp = 720 µs; Tj
prior to avalanche = 25˚C;
VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer
to fig;14
IAS Peak non-repetitive – 16 A
avalanche current
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Rth j-mb Thermal resistance junction – – 1.1 K/W
to mounting base
Rth j-a Thermal resistance junction SOT78 package, in free air – 60 – K/W
to ambient SOT404 package, pcb mounted, minimum – 50 – K/W
footprint
ELECTRICAL CHARACTERISTICS
Tj
= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 200 – – V
voltage Tj
= -55˚C 178 – – V
VGS(TO) Gate threshold voltage VDS = VGS; ID = 1 mA 2 3 4 V
Tj
= 175˚C 1 – – V
Tj
= -55˚C – 6 V
RDS(ON) Drain-source on-state VGS = 10 V; ID = 8 A – 130 180 mΩ
resistance Tj
= 175˚C – – 522 mΩ
IGSS Gate source leakage current VGS = ± 20 V; VDS = 0 V – 10 100 nA
IDSS Zero gate voltage drain VDS = 200 V; VGS = 0 V; – 0.05 10 µA
current VDS = 160 V; VGS = 0 V; Tj
= 175˚C – – 250 µA
Qg(tot) Total gate charge ID = 18 A; VDD = 160 V; VGS = 10 V – – 63 nC
Qgs Gate-source charge – – 12 nC
Qgd Gate-drain (Miller) charge – – 35 nC
td on Turn-on delay time VDD = 100 V; RD = 5.6 Ω; – 12 – ns
tr Turn-on rise time VGS = 10 V; RG = 5.6 Ω – 45 – ns
td off Turn-off delay time Resistive load – 54 – ns
tf Turn-off fall time – 38 – ns
Ld Internal drain inductance Measured tab to centre of die – 3.5 – nH
Ld Internal drain inductance Measured from drain lead to centre of die – 4.5 – nH
(SOT78 package only)
Ls Internal source inductance Measured from source lead to source – 7.5 – nH
bond pad
Ciss Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz – 1850 – pF
Coss Output capacitance – 170 – pF
Crss Feedback capacitance – 91 – pF
August 1999 2 Rev 1.100
Philips Semiconductors Product specification
N-channel TrenchMOS transistor IRF640, IRF640S
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj
= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IS Continuous source current – – 16 A
(body diode)
ISM Pulsed source current (body – – 64 A
diode)
VSD Diode forward voltage IF = 18 A; VGS = 0 V – 1.0 1.5 V
trr Reverse recovery time IF = 18 A; -dIF/dt = 100 A/µs; – 130 – ns
Qrr Reverse recovery charge VGS = 0 V; VR = 25 V – 0.8 – µC