OPA387 Zero-Drift Op Amp: 7 Checks for Microvolt Errors and Switching Artifacts
Build an OPA387 error budget covering supply-dependent offset limits, bias current, thermal EMFs, chopping artifacts and settling conditions.
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ADS7056 SAR ADC: 7 Checks for 14-Bit Frames and Previous-Sample Identity
Qualify ADS7056 14-bit sampling with AVDD referencing, 18-clock conversions, previous-sample framing and distinct startup calibration timing.
TLV758P Adjustable LDO: 7 Checks for Divider Current and Real Rail Accuracy
Budget TLV758P standby current, feedback error, effective capacitance, dropout recovery and reverse-current protection for a 500-milliamp rail.
TPS22960 Dual Load Switch: 7 Checks for Shared Slew and Output Discharge
Check TPS22960 dual-channel control, shared slew selection, inrush demand, discharge loading and reverse-current paths before sequencing rails.
SN74LVC1G123 One-Shot: 7 Checks for Retriggering and Clear-Release Pulses
Qualify SN74LVC1G123 trigger conditions, retrigger extension, clear-release behavior and the correct external timing network.
TCA9800 I2C Buffer: 7 Checks for B-Side Current and Pullup Placement
Plan TCA9800 I2C segments with B-side current-source rules, A-side pullups, sink-current compatibility and realistic power-off behavior.
TMUX1511 Analog Switch: 7 Checks for Beyond-Rail and Powered-Off Signals
Distinguish TMUX1511 powered signal limits from its 3.6-volt powered-off limit, and qualify four independent SPST paths and control states.
INA300 Current Comparator: 7 Checks for Shunt Thresholds and Latched Alerts
Set INA300 shunt thresholds with its 20-microamp limit source, delay-dependent noise adjustment, hysteresis and deliberate alert reset timing.
UCC27524A Gate Driver: 7 Checks for Dual-Channel Timing and Enable States
Check UCC27524A dual gate-drive timing, default enable behavior, peak-current limits and the conditions needed before paralleling outputs.
LP55231 LED Driver: 7 Checks for Shared Program Memory and High-Side Outputs
Plan LP55231 lighting with high-side outputs, shared engine memory, safe program loading, charge-pump headroom and checked channel mapping.