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TMUX1112 Precision Switch: 7 Checks for Hold Droop and Charge Injection

TMUX1112 conceptual validation workflow: Defined high-impedance signal nodes; Leakage + injection + control timing; Qualified settled or held voltage; not a wiring schematic

TMUX1112 Precision Switch: 7 Checks for Hold Droop and Charge Injection

Qualify TMUX1112 high-impedance switching with active-high controls, rail-bounded signals, leakage budgets and sample-node charge injection. This is a documentation-based planning guide, not a report of independent hands-on testing.

TMUX1112 conceptual validation workflow: Defined high-impedance signal nodes; Leakage + injection + control timing; Qualified settled or held voltage; not a wiring schematic
TMUX1112 validation workflow — conceptual illustration, not a complete wiring schematic.

1. Map four active-high SPST channels explicitly

The TMUX1112 provides four independent one-to-one SPST analog switches. Each channel turns on when its select input is high; this differs from active-low and mixed-polarity members of the same family. There is no address decoder that selects a single common output. Make a source, drain and control table for the actual package. If the application needs only one path connected at once, enforce that requirement in the surrounding control design rather than assuming the device automatically prevents multiple independent channels from conducting. Manufacturer documentation.

2. Keep analog signals within the powered rails

The recommended supply range is 1.08 to 5.5 volts, and the signal paths operate from ground to VDD. Fail-safe logic permits control-pin voltages under separately specified conditions, including before supply establishment, but it does not grant beyond-rail or powered-off protection to arbitrary analog signals. Check both ends of every path during startup and source removal. An input that remains at three volts while VDD collapses needs a deliberate review, even if its select pin is safely held low. Manufacturer documentation.

3. Build a leakage budget for the complete node

The three-picoamp leakage headline is a typical device characteristic, not a guaranteed complete-board limit at all temperatures. Add switch leakage, receiving-amplifier bias, capacitor leakage, protection components and contamination paths. For an illustrative one-nanofarad hold capacitor, three picoamps alone would produce three millivolts per second of voltage drift. Real results can differ substantially because other paths may dominate. Define acceptable hold time and error first, then check guaranteed limits and temperature behavior rather than designing solely from the smallest typical number. Manufacturer documentation.

4. Translate charge injection into a voltage step

When a switch changes state, charge couples into the signal node. TI characterizes a typical charge-injection value of minus 1.5 picocoulombs under its stated conditions. Dividing the magnitude by one nanofarad gives an illustrative 1.5-millivolt step. The actual step depends on signal voltage, capacitance, source impedance and the measurement setup, so this is not a guaranteed correction to subtract in software. Distinguish the immediate switching step from the later leakage-driven slope when evaluating a held voltage. Manufacturer documentation.

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5. Allow acquisition time before declaring a held sample valid

On-resistance and source impedance combine with node capacitance to determine acquisition behavior, while a real amplifier may add settling limits of its own. A larger hold capacitor reduces voltage change per unit charge but generally demands more acquisition time and source drive. Choose a defined error band and check the full transition from the previous voltage. Avoid accepting a sample solely because the control edge has completed. The required waiting interval belongs to the complete signal path, not just the switch logic timing. Manufacturer documentation.

6. Separate logic compatibility from low-power behavior

The device supports low-voltage logic control across its supply range, but the datasheet notes that using a 1.8-volt control level with a higher supply can increase current consumption. A low supply-current headline therefore needs its associated logic conditions. Define every select during controller reset and avoid floating control nodes. Observe control transitions and the sensitive analog node together using appropriately low-loading instrumentation. A conventional probe can significantly alter capacitance, droop and settling, creating an apparently improved result that is not representative of the intended circuit. Manufacturer documentation.

7. Retain a measured acquisition and hold-error record

Use clean low-leakage construction, bounded source voltages and current-limited supplies to check one path before expanding to four. Record capacitor type, source impedance, control levels, temperature and instrumentation loading. Measure initial error after opening, subsequent droop and recovery when reconnecting the source. Keep calculations and observed values clearly separated. Acceptance should specify voltage error after a defined acquisition period and hold interval, not merely state that a high-impedance sensor voltage passes through the switch without an obvious static change. Manufacturer documentation.

Related reading: TMUX1101 Analog Switch: 7 Checks for a High-Impedance Signal.

Catalog note: The exact-part search did not return a matching Epro listing during preparation. Check the current catalog; this guide makes no price, availability or included-accessory claim.

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