ADS7038 ADC: 7 Checks for Channel Identity, Averaging and CRC
Configure ADS7038 acquisition with explicit analog or GPIO pin roles, channel identity, averaging latency and CRC-aware frames before using conversion data.
Electronic Pro Blog | Epro
TPS2116 Power Mux: 7 Checks for Priority and Break-Before-Make
Plan TPS2116 source selection with its actual MODE and PR1 truth table, break-before-make interval, reverse blocking and qualified status interpretation.
TMP122 SPI Sensor: 7 Checks for Shared Data and Signed Temperature
Read TMP122 reliably by checking its bidirectional SO/I pin, temperature-field position, resolution, conversion freshness and programmable alert behavior.
TPS61023 Boost Converter: 7 Checks for Cold Start and Pass-Through
Plan TPS61023 operation by separating 1.8 V startup from low-voltage running, switch-current limits, pass-through behavior and output loading.
INA826 Instrumentation Amplifier: 7 Checks for REF and Gain Headroom
Design an INA826 signal path with the correct gain resistor, low-impedance REF drive, input bias return and common-mode versus output headroom.
TPS7A49 Linear Regulator: 7 Checks for NR/SS and Clean-Rail Claims
Plan a TPS7A49 analog rail with adequate headroom, thermal margin, effective capacitance and deliberate noise-reduction and soft-start design.
TMP141 SensorPath Sensor: 7 Checks Before Accepting Temperature Data
Use TMP141 correctly by verifying SensorPath timing, strapped identity, measurement-enable bits, fresh-data status and signed left-justified decoding.
PCM1863 Audio ADC: 7 Checks for Channel Routing and Clock Identity
Bring up PCM1863 recording with the correct two-channel capability, analog routing, software control, audio clocks and verified sample framing.
TCA9539 GPIO Expander: 7 Checks for RESET and Safe Reinitialization
Plan TCA9539 GPIO recovery around its hardware RESET pin, two address straps, external input bias and deliberate output-latch reinitialization.
ADS7042 SAR ADC: 7 Checks for Startup Calibration and Supply Scaling
Use ADS7042 data correctly by checking the first-frame calibration, AVDD reference scaling, serial bit alignment and acquisition timing before logging voltage.